Usb Jtag Module - Xilinx KC705 User Manual

Chapter 1: KC705 Evaluation Board Features
Table 1-7: SDIO Connections to the FPGA (Cont'd)
U1 FPGA Pin Schematic Net Name
AC20 SDIO_DAT0_LS
AC21 SDIO_CD_DAT3_LS

USB JTAG Module

[Figure
JTAG configuration is provided through a Digilent onboard USB-to-JTAG configuration
logic module (U59) where a host computer accesses the KC705 board JTAG chain through
a standard-A plug (host side) to micro-B plug (KC705 board side) USB cable.
A 2-mm JTAG header (J60) is also provided in parallel for access by Xilinx® download
cables such as the Platform Cable USB II and the Parallel Cable IV.
The JTAG chain of the KC705 board is illustrated in
allowed at any time regardless of FPGA mode pin settings. JTAG initiated configuration
takes priority over the configuration method selected through the FPGA mode pin settings
at SW13.
X-Ref Target - Figure 1-8
USB
Module
or
JTAG
Connector
(J60)
TDO
TDI
When an FMC card is attached to the KC705 board, it is automatically added to the JTAG
chain through electronically controlled single-pole single-throw (SPST) switches U76 and
U77. The SPST switches are in a normally closed state and transition to an open state when
an FMC mezzanine card is attached. Switch U76 adds an attached FMC HPC mezzanine
card to the FPGAs JTAG chain as determined by the FMC_HPC_PRSNT_M2C_B signal.
Switch U77 adds an attached FMC HPC mezzanine card to the FPGAs JTAG chain as
determined by the FMC_LPC_PRSNT_M2C_B signal. The attached FMC card must
implement a TDI-to-TDO connection via a device or bypass jumper for the JTAG chain to
be completed to the FPGA U1.
24
Send Feedback
I/O Standard
LVCMOS25
LVCMOS25
1-2, callout 6]
SPST Bus Switch SPST Bus Switch
U76 U77
N.C.
J22 J2
FMC HPC FMC LPC
Connector Connector
TDI TDO TDI TDO
Figure 1-8: JTAG Chain Block Diagram
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U57 Level Shifter
Pin Name (A) Pin Name (B)
A1 B1
A4 B5
Figure
N.C.
3.3V 2.5V
U102
SN74AVC1T45
Voltage
Translator
TDI TDO
U9 SDIO Connector
Pin Number Pin Name
7 DAT0
1 CD_DAT3
1-8. JTAG configuration is
U1
Kintex-7
FPGA
TDI
TDO
UG810_c1_08_031214
KC705 Evaluation Board
UG810 (v1.6.2) August 26, 2015