Xilinx KC705 User Manual page 68

Chapter 1: KC705 Evaluation Board Features
X-Ref Target - Figure 1-36
Cooling
U1 Pin L26
Monitoring Voltage and Current
Voltage and current monitoring and control are available for selected power rails through
the Texas Instruments Fusion Digital Power GUI. The three onboard TI power controllers
(U55 at address 52, U56 at address 53, and U89 at address 54) are wired to the same PMBus.
The PMBus connector, J39, is provided for use with the TI USB Interface Adapter PMBus
pod (TI part number EVM USB-TO-GPIO), which can be ordered from the TI website
[Ref
[Ref
values for the power rail listed in
In each of these the three tables (one per controller), the Power Good (PG) On Threshold is
the set-point at or below which the particular rail is deemed "good". The PG Off Threshold
is the set-point at or below which the particular rail is no longer deemed "good". The
controller internally ORs these PG conditions together and drives an output PG pin High
only if all active rail PG states are "good". The On and Off Delay and rise and fall times are
relative to when the board power on-off slide switch SW15 is turned on and off.
68
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J61
3
Fan Tach
2
Fan +12V
Fan
1
Fan GND
VCC2V5
SM_FAN_PWM
FPGA
Figure 1-36: FPGA Cooling Fan Circuit
23], and the associated TI Fusion Digital Power Designer GUI (downloadable from
24]). This is the simplest and most convenient way to monitor the voltage and current
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VCC12_P
R392 R393
10.0K 1% 10.0K 1%
1/10W 1/10W
R390
D14 4.75K 1%
100V 1/10W
500 mW
DL4148
2 4
R391
Q17
1.00K 1%
NDT30555L
1/16W
1
1.3 W
3
GND
Table 1-31, Table 1-32
SM_FAN_TACH
U1 Pin U22
D15
2.7V
500 mW
MM3Z2V7B
GND
UG810_c1_36_031214
and Table 1-33.
KC705 Evaluation Board
UG810 (v1.6.2) August 26, 2015
FPGA