Default Jumper Settings - Xilinx KC705 User Manual

For the kintex-7 fpga
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Appendix A: Default Switch and Jumper Settings
The default mode setting M[2:0] = 010 selects Master BPI configuration at board
power-on.
Table A-2: SW13 Default Switch Settings

Default Jumper Settings

See
Table A-3: KC705 Default Jumper Settings
Header
Callout
Reference
Designator
2-pin
1
J3
2
J42
3
J43
4
J53
5
J56
6
J65
7
J68
3-pin
8
J27
9
J28
10
J29
11
J30
12
J47
13
J48
14
J69
2x3
15
J32
76
Send Feedback
Position
Function
1
FLASH_A25
2
FLASH_A24
3
FPGA_M2
4
FPGA_M1
5
FPGA_M0
Figure A-3
for the locations of jumpers listed in
Jumper
Position
1-2
SPI SELECT = Onboard SPI flash memory device
None
U35 REF3012 XADC_AGND L17 bypassed
1-2
U35 REF3012 XADC_AGND = GND
None
U55 UCD9248 RESET_B = LOGIC 1 (NOT RESET)
None
U56 UCD9248 RESET_B = LOGIC 1 (NOT RESET)
1-2
FMC VADJ = ON
1-2
XADC_VCC5V0 =VCC5V0 (5V)
2-3
SFP RX BW = FULL
2-3
SFP TX BW = FULL
1-2
U32 EPHY CONFIG5 = LOGIC 1
1-2
U32 EPHY CONFIG4 = LOGIC 1
1-2
XADC_VREFP = REF3012 XADC_VREF
2-3
XADC_VCC = ADP123 1.85V
1-2
REF3012 VIN = XADC_VCC5V0
5-6
PCIe lane width = 8
www.xilinx.com
Default
A25
Off
A24
Off
M2
Off
M1
On
M0
Off
Table
A-3.
Description
UG810 (v1.6.2) August 26, 2015
Schematic
0381502 Page
26
31
31
36
40
36
31
22
22
25
25
31
31
31
21
KC705 Evaluation Board

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