Xilinx KC705 User Manual page 61

Table 1-28: HPC Connections, J22 to FPGA U1 (Cont'd)
J22 Pin Schematic Net Name
J2 NC
J3 NC
J6 FMC_HPC_HA03_P
J7 FMC_HPC_HA03_N
J9 FMC_HPC_HA07_P
J10 FMC_HPC_HA07_N
J12 FMC_HPC_HA11_P
J13 FMC_HPC_HA11_N
J15 FMC_HPC_HA14_P
J16 FMC_HPC_HA14_N
J18 FMC_HPC_HA18_P
J19 FMC_HPC_HA18_N
J21 FMC_HPC_HA22_P
J22 FMC_HPC_HA22_N
J24 NC
J25 NC
J27 NC
J28 NC
J30 NC
J31 NC
J33 NC
J34 NC
J36 NC
J37 NC
J39 NC
KC705 Evaluation Board
UG810 (v1.6.2) August 26, 2015
I/O FPGA
J22 Pin
Standard U1 Pin
K1
K4
LVDS C12 K5
LVDS B12 K7
LVDS B14 K8
LVDS A15 K10
LVDS B13 K11
LVDS A13 K13
LVDS J16 K14
LVDS H16 K16
LVDS K14 K17
LVDS J14 K19
LVDS L11 K20
LVDS K11 K22
K23
K25
K26
K28
K29
K31
K32
K34
K35
K37
K38
K40
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Feature Descriptions
Schematic Net Name
NC
NC
NC
FMC_HPC_HA02_P
FMC_HPC_HA02_N
FMC_HPC_HA06_P
FMC_HPC_HA06_N
FMC_HPC_HA10_P
FMC_HPC_HA10_N
FMC_HPC_HA17_CC_P
FMC_HPC_HA17_CC_N
FMC_HPC_HA21_P
FMC_HPC_HA21_N
FMC_HPC_HA23_P
FMC_HPC_HA23_N
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
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I/O FPGA
Standard U1 Pin
LVDS D11
LVDS C11
LVDS D14
LVDS C14
LVDS A11
LVDS A12
LVDS G13
LVDS F13
LVDS J11
LVDS J12
LVDS L12
LVDS L13
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