Xilinx KC705 User Manual page 58

Chapter 1: KC705 Evaluation Board Features
Table 1-28: HPC Connections, J22 to FPGA U1 (Cont'd)
J22 Pin Schematic Net Name
A18 NC
A19 NC
A22 FMC_HPC_DP1_C2M_P
A23 FMC_HPC_DP1_C2M_N
A26 FMC_HPC_DP2_C2M_P
A27 FMC_HPC_DP2_C2M_N
A30 FMC_HPC_DP3_C2M_P
A31 FMC_HPC_DP3_C2M_N
A34 NC
A35 NC
A38 NC
A39 NC
C2 FMC_HPC_DP0_C2M_P
C3 FMC_HPC_DP0_C2M_N
C6 FMC_HPC_DP0_M2C_P
C7 FMC_HPC_DP0_M2C_N
C10 FMC_HPC_LA06_P
C11 FMC_HPC_LA06_N
C14 FMC_HPC_LA10_P
C15 FMC_HPC_LA10_N
C18 FMC_HPC_LA14_P
C19 FMC_HPC_LA14_N
C22 FMC_HPC_LA18_CC_P
C23 FMC_HPC_LA18_CC_N
C26 FMC_HPC_LA27_P
C27 FMC_HPC_LA27_N
C30 FMC_HPC_IIC_SCL
C31 FMC_HPC_IIC_SDA
C34 GA0=0=GND
C35 VCC12_P
C37 VCC12_P
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I/O FPGA
J22 Pin
Standard U1 Pin
B17
B20
C4 B21
C3 B24
B2 B25
B1 B28
A4 B29
A3 B32
B33
B36
B37
B40
D2 D1
D1 D4
E4 D5
E3 D8
LVDS H30 D9
LVDS G30 D11
LVDS D29 D12
LVDS C30 D14
LVDS B28 D15
LVDS A28 D17
LVDS F21 D18
LVDS E21 D20
LVDS C19 D21
LVDS B19 D23
D24
D26
D27
D29
D30
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Schematic Net Name
NC
FMC_HPC_GBTCLK1_M2C_P
FMC_HPC_GBTCLK1_M2C_N
NC
NC
NC
NC
NC
NC
NC
NC
NC
PWRCTL1_VCC4A_PG
FMC_HPC_GBTCLK0_M2C_P
FMC_HPC_GBTCLK0_M2C_N
FMC_HPC_LA01_CC_P
FMC_HPC_LA01_CC_N
FMC_HPC_LA05_P
FMC_HPC_LA05_N
FMC_HPC_LA09_P
FMC_HPC_LA09_N
FMC_HPC_LA13_P
FMC_HPC_LA13_N
FMC_HPC_LA17_CC_P
FMC_HPC_LA17_CC_N
FMC_HPC_LA23_P
FMC_HPC_LA23_N
FMC_HPC_LA26_P
FMC_HPC_LA26_N
FMC_HPC_TCK_BUF
FMC_TDI_BUF
UG810 (v1.6.2) August 26, 2015
I/O FPGA
Standard U1 Pin
LVDS E8
LVDS E7
LVDS C8
LVDS C7
LVDS D26
LVDS C26
LVDS G29
LVDS F30
LVDS B30
LVDS A30
LVDS A25
LVDS A26
LVDS F20
LVDS E20
LVDS B22
LVDS A22
LVDS B18
LVDS A18
KC705 Evaluation Board