Interrupt Functions; Normal Interrupt Processing - Toshiba TLCS-90 Series Data Book

TOSHIBA
TMP90C840
3.3 Interrupt Functions
The TMP90C840 supports a general purpose interrupt processing mode to
acknowledge internal and external interrupt requests, as well as a micro
DMA processing mode that enables automatic data transfer by the
cpu.
Immediately after the reset state is released, all interrupt requests
are processed in the general purpose interrupt processing mode.
However, they can be processed in the micro DMA processing mode by using
a DMA eoable register to be described later.
Fig. 3.3
(1)
is a flowchart of the interrupt response sequence.
Interrupt Processing
Reading of Interrupt Vector 'V'
General-Purpose
Interrupt Processing
YES
Micro-DMA
Processing
Fig. 3.3 (1) Interrupt Response Flowchart
When an interrupt is requested, the source of the interrupt transmits
the request to the CPU via an internal interrupt controller. The CPU
starts processing the interrupt if it is a non-maskable or maskable
interrupt requested in the EI state. However, a maskable interrupt
requested in the DI state is ignored and acknowledged.
Having acknowledged an interrupt, the CPU reads out the interrupt vector
from the internal interrupt controller to find out the interrupt source.
Then, the CPU checks if the interrupt requests the general purpose
interrupt processing or the micro DMA processing, and proceeds to each
processing ••
As the reading of an interrupt vecotors is performed in the internal
operating cycles, the bus cycle at that time results in dummy cycles.
3.3~1
Normal interrupt processing
A normal interrupt is processed as shown in Fig. 3.3. (2).
The CPU stores the contents of the program counter PC and the register
pair AF into the stack, and resets the interrupt enable flag IFF to
"0" (disable interrupts). It then transfers the value of the
interrupt vector
"v"
to the program counter, and the processing jumps
to an interrupt processing program.
MPU90-37