Toshiba TLCS-90 Series Data Book page 19

TOSHIBA TMP 8048A/TMP 8035A, TMP8049A/TMP 8039A
XTAL/lS
(2) External input clock form Tl terminal
(minimum cycle time 3 x ALE cycle)
.........•.• Event Counter mode
The counter is presettable and readable with two MOV instructions
wh i ch ti- ans fe r the con ten t of the ac cumula t or to the count er and vi ce
versa. The counter content is not affected by a Reset and is
initialized solely by the MOVT, A instruction. The counter is stopped
-by a Reset or STOP TCNT instruction and remains stopped until started
by STRT
T
instruction or as an event counter by a srRT CNT. One
started the counter will increment to its maximum count (FF) and
overflow to Zero continuing its count until stopped by
a
STOP TCNT
instruction or RESET.
The increment from maximum count to Zero (overflow) results in the
setting of an overflow flag and the generation of an interrupt request.
When interrupt acknowledged a subroutine call to Location 7 will be
initiated. Location
7
should store the starting address of the timer
or counter service routine. The state of the overflow flag is testable
with the conditional Jump (JTF). The flag is reset by excuting a JTF
or by RESET.
Figure 2 illustrates the concept of the timer circuit.
1/32
Pre-scaler
Cleared on Start Timer
STOP
TCNT 0
8-Bi
t
Timer/
Counter
IT
JTF Instruction
Timer In te rrupt
Request Flip-Flop
r-------~Edge
Detector
Read/Write Enable INT
Titre r
Int
e rrupt Enab
1 e
Fig.
2
Concept of Timer Circuit
MCU48-9