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TOSHIBA
TMP90C840
FFOOH+V+O
I
Number of transfer
FFOOH+V+l
I
Destination address (Lower)
FFOOH+V+2
I
Destination address (Upper)
FFOOH+V+3
I
Source address (Lower)
FFOOH+V+4
Source address (Upper)
7
6
5
4
3
2
1
0
FFOOH+V+5
(Transfer mode)
x
I
x
I
x
I
x
I
x
I
I
I
I
0
0
Fix current destina-
I
tion/source addresses
I
0
1
Increment destination
I
address
I
1
0
Increment source ad-
I
dress
I
1
1
Decrement source ad-
I
dress
I
0
I-byte transfer
1
2-byte transfer
(Note)
x
don't care
Fig. 3.3 (4)
Parameters for Micro DMA Processing
Parameters for the micro DMA processing are located in the internal
RAM area (See Table 3.3 (1)
Interrupt Sources).
The start address of
each parameter is "FFOOHH + interrupt vector value", from which a six
bytes' space is used for the parameter.
This space can be used for
any other memory purposes if the micro DMA processing is not used.
The parameters normally consist of the number of transfer,
addresses
of destination and source, and transfer mode.
!he number of transfer
indicates
the
number
of
data
transfer
accepted
in
the
micro
DMA
processing.
The amount of data transferred by a single micro DMA processing is
limited
to
one
or
two
bytes.
Both
the
destination
and
source
addresses are specified by 2-byte data.
The address space available
for the micro DMA processing ranges from OOOOH to FFFFH.
Bit s 0 and 1 of the
transfer mode indicates
the mode updat ing the
source and/or destination,
and the
bit 2 indicates the data
length
(one byte or two bytes).
MPU90-41
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