Toshiba TLCS-90 Series Data Book page 180

TOSHIBA
TMP8243P/TMP8243PI
Read Hade
The device has one read mode. The operation code and port address are latched
from the input port 2 on the high to low transition of the PROG pin. As soon
as the read operation and port address are decoded, the appropriate outputs are
3-statec,
and the input buffers switched on. The read operation is
t~rminatec
by a low to high transition of the PROG pin. The port (4, 5, 6 or 7) that was
selected is switched to the
input mode.
3-stated mode while port
2
is returned to the
Normally, a port will be in an output (write mode) or input (read mode). If
modes are changed during operation, the first read following~ write should be
ignored; all following reads are v~lid. This is to allow the external driver
on the port to settle after the first read instruction removes the low impedancE
drive from the TMP8243P output. A read of any port will leave that port in a
high impedance state.
125
,-...
<
~
,-... 100
...;l
c
~
w
75
50
25
a
GUARANTEED WORST CASE
CURRENT SINKING
CAPABILITIES OF
ANY
I/O
PORT PIN vs. TOTAL SINK
CURRENT OF ALL PINS
0 1 2 3 4 5 6 7
8 9 10 11 12 13
MAXIMUM SINK CURRENT ON
ANY PIN@.45V
MAXIMUM 10L WORST CASE
PIN(mA)
MCU48-170