Port 2 (P20 - P27) - Toshiba TLCS-90 Series Data Book

TOSHIBA TMP90CB40
3.5.3 Port 2 (P20 - P27)
Port 2 is an B-bit general-purpose I/O port (P2: memory address FFC4H)
whose I/O functionsis specified by the control register (P2CR : bit 1
of memory address FFC5H) for each bit. All bits of the output latch
and the control register are initialized to "0" by resetting , Whereby
Port 2 turns to the input mode.
In addition to the general-purpose I/O port function, it functions as
an address bus
(AB -
A15). The address bus func t ion can be se lec ted
by setting the EXT register (EXT: bit 2 of memory address FFC2H,
shared with port 1) to
"I"
and set t ing the Port 2 control regis ter
(P2CR) to the output mode. When the Port 2 control register is set to
"0", Port 2 functions as an input port, regardless of the status of
the EXT register.
For the TMP90CB41, all bits of the EXT register and the control
register are always set to "1", and Port 2 functions as an address bus
(AB
to A15).
Reset
Write
H
p2CR
~
rT
CD
ti
~
Port 2
Pl
.....
(P20-P27)
0
$lJ
rT
Pl Write
to P2
c
Ul
Read P2
Fig. 3.5 (4) Port 2
MPU90-59