External Interrupt Control - Toshiba TLCS-900/L1 Series Manual

Original cmos 16-bit microcontroller
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(2) External interrupt control

Symbol Name Address
Interrupt
8CH
IIMC0
input mode
(Prohibit
control 0
RMW)
INT2 level enable
0
Edge detect INT
1
H Level INT
INT1 level enable
0
Edge detect INT
1
H Level INT
INT0 level enable
0
Edge detect INT
1
H Level INT
NMI rising edge enable
0
INT request generation at falling edge
1
INT request generation at rising/falling edge
Symbol
Name Address
Interrupt
8DH
input
IIMC1
(Prohibit
mode
RMW)
control1
INT5 level enable
0
Edge detect INT
1
H Level INT
INT4 level enable
0
Edge detect INT
1
H Level INT
INT3 level enable
0
Edge detect INT
1
H Level INT
When switching IIMC0 and IIMC1 registers, first every FC registers in port which built-in INT function set to 0.
7
6
I2EDGE
0
0
Write "0".
INT2EDGE
INT2EDGE
0: Rising
0: Edge
1: Falling
1: Level
7
6
I5EDGE
0
INT5EDGE
INT5
0: Rising
0: Edge
1: Falling
1: Level
91C829-38
5
4
3
I2LE
I1DGE
I1LE
W
0
0
0
INT1EDGE
INT1EDGE
0: Rising
0: Edge
1: Falling
1: Level
5
4
3
I5LE
I4EDGE
I4LE
W
0
0
0
INT4EDGE
INT4
0: Rising
0: Edge
1: Falling
1: Level
TMP91C829
2
1
I0EDGE
I0LE
NMIREE
0
0
INT0EDGE
INT0
1: Operates
0: Rising
0: Edge
even on
rising +
1: Falling
1: Level
falling edge
of
NMI
2
1
I3EDGE
I3LE
0
0
INT3EDGE
INT3
0: Rising
0: Edge
1: Falling
1: Level
2006-03-15
0
0
0

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