Toshiba TLCS-90 Series Data Book page 285

TOSHIBA
TMP90C840
TRUN
<--
- 0 0 Stop Timer 0 and Timer 1, and clear them
to "0".
TCLK
<- -
- 0 1 x x Select
~Tl
as the input clock.
lOx x Set 8-bit PPG mode.
TMOD
<-
TFFCR
<-
- - - - 0 0 1 1 Clear the output, and enable the inver-
I I
s ion by Timer
1.
Writing "01" provides negative logic pulse
TREGO
<-
0 0 0 0 0 I 0 1 Write "SH".
TREGI
<-
0 0 0 1 0 1 0 0 Write "14H".
SMMOD
<- -
x x 0 1 Select P60 as the TOI pin.
P67CR
<- - - - - -
1
TRUN
<-
1 1 0 Start Timer 1.
(Note) x: Don't care No change
(4) 8-bit PWM (pulse width modulation) mode
This mode is only available for Timer 1 and Timer 3, and generates two
types of 8-bit resolution PWM (PWMI and PWM3).
Pulse width modulation is output to TOI pin (also used as P60) when
us ing Timer 1, and to T03 p in (a Iso used as P70 or P83) when us ing
Timer 3.
Timer 0 and Timer 2 can be also used as 8-bit timers.
Following is the timing of Timer 1 (PWMl) (The operation is the same
as when Timer 3 is selected):
The inversion of the timer output occurs when the up-counter (UC!)
matches the set value of the timer register TREGl, as well as when an
overflow of 2n - 1 (n
=
6, 7 or 8 selected by TMODI or TMODO) occurred
at the counter. The up-counter UCI is cleared by the occurrence of an
overflow of 2n - 1.
The following condition must be obtained in this PWM mode:
(Set value of timer register)
<
(set overflow value of 2
n
- 1 counter)
Match signal
from Comparator
2
n
_l
Overflow
TOI
I . .
tpwM
. 1
The PWM mode can be illustrated as follows:
MPU90-87