Toshiba TLCS-90 Series Data Book page 16

TOSHIBA
TMP8048A/TMP8035A,TMP8049A/TMP8039A
There are three locations in Program Memory of special importance.
• Location 0
Address
4095
2048
2047
Memo
ry
Bank 1
Memory Bank 0
Program Memory Area
Activating the Reset line of the processor causes the first instruction
to be fetched from Location
O.
• Location 3
Activating the interrupt line of the processor (if interrupt enabled)
causes a jump to subroutine defined by address held in Location 3.
• Location 7
A timer / counter
enabled) causes
Location 7.
interrupt resul ting from a timer/counter overflow
a jump to a subroutine defined by address held
(if
in
• Program address 0-2047 and 2048-4095 are called memory banks 0 and 1 respec-
tively switching of memory banks is achieved by changing the most
significant bit of the program counter
(PC)
during execution of an
uncoditional jump instruction or call instruction executed after using SEL
MBO or SEL MBI.
Reset operation automatically selects Bank
O.
(2)
Data Memory
• Resident Data Memory (volatile
RAM)
is organized as 64 words (TMP8048A)
or 128 words (TMP8049A) by 8-bits wide •
• The first 8 locations
(0 - 7)
of the memory array are designed as
working registers and are directly addressable by several instructions.
By executing a Register Bank switch instruction (SEL
RBI)
locations 24
- 31 are designated as the working registers in palce of 0 - 7.
MCU48-6