Toshiba TLCS-90 Series Data Book page 352

8 bit microcontroller
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TOSHIBA
Appendix B Table of Machine Instructions Codes
Appendix B Table of Machine Instruction Codes (1/4)
I-byte opcode instruction
H\L
o
2
3
4
5
6
8
o
NOP
CPL
A
LD
2
I
HALT
I
01
I
I
NEG I
A I
LD
MUL
HL,n
LD
3
I
4
I
El
I
I
I
DIV I ADD
HL,nllX,nn
5
6
I
7
I
8
9
A
I
I
I INCX I EX
EX
EXX
I (n)
IDE,HL AF,AF'
I
I
I
ADD
ADD I 10AR IDJNZ
DJNZ I JP
lY,nn SP,nnl HL,ddl
d
BC,d I nn
B
DAA
A
JRL
dd
I
C
I
I
RCF
I
I
I
CALL
I
nn
D
SCF
CALR
dd
E I
I
CCF
IDE
I (
RET
RE
I
I
I
LO
10
LD
10
ILD
ILD
10
10
10
10
10
10
IL
A,B
A,C
A,O
A,E
A,H
A,L
A,A I A,(n)1 B,A
C,A
D,A
E,A
H,A
L,A
A,A I(n
I
I
I
I
10
LD
LD
LO
LD
LD
LD
110
ILD
LD
LD
I
110
LD
LD
IL
B,n
C,n
D,n
E,n
H,n
L,n
A,n I (n)n IBC,nn DE,nn HL,nnl
11X,nn IY,nn SP,nnl (n
I
LD
LD
LD
I
HL,BC HL,OE HL,HLI
I
PUSH
PUSH
PUSH I
BC
DE
HL
I
I
I
LD
LD
I HL , IX HL, IY
I
IpUSH
I
IX
I
I
I
I
I
PUSH
PUSH I
I pop
POP
POP I
I POP
POP
POP I
IY
AF
I
I BC
DE
HL
I
I IX
IY
AF
I
I
ADD
ADC
SUB
sac
AND
XOR
OR
CP
I ADD
ADC
SUB
SBC
AND
XOR
OR
C
A,(n) A,(n) A,(n) A,(n) A,(n) A,(n) A,(n) A,(n) I A,n
A,n
A,n
A,n
A,n
A,n
A,n
A
I
OR
CP
I ADD
ADC
SUB
sac
AND
XOR
OR
HL(n) HL(n) IHL,~n HL,nn HL,nn HL,nn HL,nn HL,nn HL,nn HL
ADD
ADC
SUB
sac
AND
XOR
HL(n) HL(n) HL(n) HL(n) HL(n) HL(n)
C
I
I
I
INC
B
INC
INC
INC
INC
INC
INC I INC
I DEC
DEC
DEC
DEC
DEC
DEC
DEC I D
C
D
E
H
L
A I
(n) I
B C D
E
H
L
A I
I
I
I
9
I INC
I
BC
INC
DE
INC
HL
INC
INC
INC I INCW I DEC
DEC
DEC
DEC
DEC
DEC I D
IX
IY
SP
I
(n) I BC
DE
HL
IX
IY
SP
I
I
I
A
I
RLC
I
A
I
B
I
I
RRC
A
RL
A
RR
A
SLA
A
SRA
A
SLL
A
SRL I BIT
BIT
BIT
BIT
BIT
BIT
BIT
E
A 10,(n) l,(n) 2,(n) 3,(n) 4,(n) 5,(n) 6,(n) 7,
I
I
RES
RES
RES
RES
RES
RES
RES
RES I SET
SET
SET
SET
SET
SET
SET
S
O,(n) l,(n) 2,(n) 3,(n) 4,(n) 5,(n) 6,(n)
7,(n)IO,(n) l,(n) 2,(n) 3,(n) 4,(n) 5,(n) 6,(n) 7,
C I JR
JR
JR
JR
JR
JR
JR
JR
I F,d
LT,d
LE,d
ULE,d PE,d
M,d
Z,d
C,d
I
o
I
I
I
I
JR
d
E I src
src
arc
arc
src
src
src
src
Idst
I (BC) (DE)
(HL)
(nn)
(IX)
(IY)
(SP)
(n)
I(BC)
I
I
I
F I src
src
arc
src
I dst
dst
dst
dst
Ireg
I (IX+d )(IY+d)( SP+d )(HL+A) I (IX+d)(IY+d)( SP+d)(HL+A) I
BI
BC
JR
JR
JR
JR
GE,d
GT,d
UGT,d PO,d
dst
(DE)
dst
(HL)
dat
dst
(nn) (IX)
JR
P,d
dst
(lY)
JR
J
NZ,d
NC
dst
(SP)
reg
reg
CIDE
D/HL
reg
E
reg
reg
reg
'dIIX
LilY
A/SP
(Note)
Codes located in "EOH to FEH" are part of 2-byte opcode instructions.
Appendix-12

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