Toshiba TLCS-90 Series Data Book page 293

TOSHIBA TMP90C840
When the interrupt INTI is generated at the r1s1ng edge of TI4 input,
set the CAPI value (c) plus a delay time Cd) to TREG4, and set the
above set value (c+d) plus a one-shot pulse width (p) to TREG5. When
the interrupt INTI occurs the register T4TRG is selected that the TFF4
inversion is enabled only when the up-counter value matches TREG4 or
5. When interrupt INTT5 occurs, the inver3ion is disabled.
~ Keep counting (Free-Running)
Count Clock
n
n n n n n
J1JlJlllJl-
J1J1Jlll JlJlJUl
(Internal Clock)
-1
U U U U
U L_______ -- ---. ---
C c+d c+d+p
Input of TI4
Load the up-counter value into Capture
(External Trigger Pulse)
Resister
1
(CAP1)
INTl
Match with TREG4
Inversion
Enable
Match with TREGS
Inversion
disable
Timer Output T04
,
,
,
,
,
Delay Time
Pulse Width
,
,-
(d)
..
,~
(p)
..
,
Fig. 3.6 (16)
One-Shot Pulse Output (with delay)
Example: Generate a 2ms one-shot pulse with a 3ms delay from the rising
edge of an external trigger pulse ("H" level width: IOms -
30ns)
Main setting
-T4MOD <- x x I 0 I
, ,
,-->
, ,->
, I-I
00 1
Keep counting (Free-running)
Count with oTl.
T ___________
>
Load the up-counter value into CAPI at
th~
rising edge of TI4 input.
T4FFCR<- x x
a a a a
0
a
,
'"
, T ___
>
, >
::0
:~ !*:~o~ ,:~,~~)}
INTEL <- 0 I 0 -
TRUN <- 1 1 -
Clear TFF4 to "0".
Disable TFF4 inversion.
Select P83 as the T04 pin.
Enable INTI, and disable INTT4 and INTTS.
Start Timer 4.
MPU90-95