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B-register
16
+6 Circuit
+
6
A-register
+ 15
Decimal
-6
Corrector
o
0 0 1
o
1 1 0
o
1 1 0
o
1 1 0
1 1
o
1 1 1 1'1'0 0
o
0 0 1
o
1
o
1
I,I~,I,
1
1 0
1 0'0 0 1
1
o
I 000 0 0
-Carry
-Carry
• Carry
_ - - - - - - - - -
~carry
from high-
order group; therefore,
subtract 6 from high
order.
Circuit
31
I ,
0 0
1 000 1 -Answer
Figure 2-25.
Packed Decimal Addition with Correction
Correct parity has not been mentioned
up to this point as a parity line does
not exist in ALU.
ALU uses a two wire
approach where both logical levels are
used for every signal.
Either an up
(+~
or a down (-L) level will exist for
every bit position throughout ALU.
Both
outputs of each signal are then run
through an -exclusive or- unit to check
for the presence of one and only one up
level.
ALU DETAILED DESCRIPTION
The ALU unit. through the combinations
of three control lines can perform the
following functions:
•
Adding (and subtracting by comple-
ment entry)
•
ANDing (output only if both inputs
are present)
•
ORing (output if either input is
present)
•
Exclusive OR (output if only one
input is present)
The inputs and outputs are divided into
four-bit groups with external controls
to determine if the low order group will
carry into the high order group. Opera-
tion can thus be in BCD form or in pure
binary.
Field
012
Value
Mnemonic
Function
000
0
0
Add Function or Block Carry
001
I
I
Force a Carry
010
2
AND Function
o
I I
3
Q
OR Function
I 00
4
OC
5et Carry Latch (53) if a
Carryout of ALU Occurred.
101
5
IC
Force a Carry and 5et 53
if
Carryout of ALU.
I I 0
6
CC
If Carry-In, 5et 53 if Carryout
of ALU.
I I I
7
V-
Exclusive OR
Figure 2-26.
Read Only Storage
CC Control Field
2-15
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