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6-24
Position 7 of the S-
register is set to a
1
(1->S7).
On the branch line a
test is made on S7.
This test
is done early in the cycle
before any status is set by
the C line statement.
As a
result, a 1, 0 branch is
executed to 04AE.
ADDRESS 04AE:
Again, the
R-register data is decimal
added to itself.
And again,
since the data in the R-
register is zero and there is
no carry insert, the resultant
answer is zero with no carry
out.
S6 is set to zero
(O->S6).
Branch 0,0 to
address 04E4.
ADDRESS 04B4:
The S line
statement, STORE, has no
effect.
The data in the D-
register is added to itself
(D/D+->DC) •
A source
0100
0100
B source
0100
0100
D-register 1000
1000
no carryout, S3 is still zero.
Position 7 of the S-register
is set to a
1
(1->S7).
Since
S7 was set previously, the
branch conditions now set up a
1,1 branch to address 04AF.
ADDRESS 04AF:
The MN
registers, set by UV, address
main core eMS) to read data at
address XXXX (UV->MN MS).
The
data in the R-register is
again DECIMAL added to itself
(RtR+C->RC).
No carries are
involved.
Position 6 of the
S-register is set to
1
(1->S6), but not before the
branch test is made and a 0 0
branch is taken to address
04B4.
ADDRESS 0484:
The data just
read from address XXX X is lost
and the data in the
R-register, all zeros, is
returned to core (STORE).
The
data in the D-register is
added to itself with no carry
insert.
A source
1000
1000
B source
1000
1000
D-register 0001
0000
with a carryout.
Because of
the C to the right of the
arrow, the carry out sets
position 3 of the S-register.
Even though S7 is set to a
one, the expression 1->S7 sets
S7 again.
A 1,1 branch is
taken to address 04AF.
ADDRESS 04AF:
The data in the
R-register is decimal added to
itself with a carry insert.
The C to the left of the arrow
allows S3 to set a carry into
ALU.
(RtR+C->RC).
The data
in the R-register is now 0000
0001.
The C to the right of
the arrow allows a carryout to
set S3.
Because there is no
carryout, S3 is again zero.
Main storage (MS) is again
read (UV->MN).
Position 6 of
the S-register is set to one
(1 S6).
S6 had previously
been set to a one so the
branch test executes a
1,0
branch to address 04B6.
ADDRESS 04B6:
The data just
computed is written at address
XXXX (STORE).
Position 2 of
the S-register is set to 0
(0->S2) but not before the
branch tests (S2,0) determine
that a 1,0 branch is to be
taken to address 04AA. Remem-
ber, one of the conditions
given before starting the
problem was that S2 was set to
a one.
AD.DRESS 04AA:
The expression
WRITE has no effect at this
time, because it follows the
STORE operation of address
04B6.
The data in the D-
register is added to itself
with no carry inserted.
A source
0001
B source
0001
D-register 0010
0000
0000
0000
no carryout S3
= o.
Position
7 of the S-register is set to
zero (0->S7).
A 1,0 branch is
taken to address 04AE.
ADDRESS 04AE:
The data in the
R-register
is
DECIl>1.AL added to
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