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nation with the function desired
(read,write) to condition the proper
Y-driver.
Absence of an M-register
2-bit indicates an address in the .range
'00000 to 08191, and causes Y1 to turn on
for a read cycle or Y2 to turn on for a
write cycle.
An M-register 2-bit indi-
cates an address in the range 08192 to
"16383 and causes Y2 to turn on for a
read cycle or Y1 to turn on for a write
cycle.
16K AUXILIARY STORAGE
•
•
•
•
Four 256-byte auxiliary storage
areas included in a 16K storage
unit.
M-register 2-bit and 3-bit determine
auxiliary storage to be addressed
N-register determines specific
address from 000-255
CPU local storage in second 8K stor-
age unit.
Included in the 16,384 position storage
unit are 1024 additional byte positions
of auxiliary storage.
These are divided
into four 256-position areas called MPX
o
storage, MPX 1 storage, MPX 2, and CPU
local storage.
When the CPU wishes to
address one of these auxiliary storage
areas, the main-auxiliary latch in the
CPU is set to auxiliary, and the desired
addr~ss
is placed in the N-register.
The CPU further specifies which area of
auxiliary storage is to be addressed by
coding the M-register 2-and 3-bits as
follows:
M-reg
M-reg
Auxiliary Storage
2-bit
3-bit
Area Selected
0
0
MPX
0
0
1
MPX
1
1
0
MPX 2
1
1
CPU local
For example, if the CPU wishes to
address a byte of information in the CPU
local area of auxiliary storage, the
desired byte-address would be placed
into the N-register.
The M-register
2-and 3-bits would both be set to one.
All other M-register bits would be set
to
zero.
The 16K auxiliary storage unit has
the four auxiliary drivers: two read
drivers and two write drivers.
This is
exactly the same as the 8K auxiliary
storage arrangement.
However, now the
drivers must drive the lines through two
8K storage units.
This means that the
local drivers must
be
controlled by the
M-register 3-bit, the M-register 2-bit,
and the fUnctions read and write,
because of the phase reversal between
the two 8K blocks of storage.
The need
for this selection can be seen on Figure
2-57.
16K SUMMARY
Just as we did when we finished the 8K
storage unit, let's review the quanti-
ties of drivers, gates, etc., in the 16K
storage unit.
For a 16K storage unit, there are:
64X drive lines
64X read gate transistor
64X write gate transistor
16X gate decode switches
4X read drivers
4X write drivers
128Y drive lines
128Y read gate transistors
128Y write gate transistor
16Y gate decode switches
8Y read drivers
8Y write drivers
8Y auxiliary storage drive lines
2 auxiliary storage read drivers
2 auxiliary storage write drivers
Notice that the quantities are all
the same as those quantities given for
the 8K summary.
This illustrates why
the phase reversal scheme is used: dou-
ble the size of storage unit can be
addressed with the same drive scheme.
The only quantity changed was the number
of core planes, and this of course,
doubled.
PHASE REVERSAL ADDRESSING (32K)
•
Four 8K blocks of core storage.
•
Phase reversal occurS between the
basic BX and the second 8K, between
the third BK and the fourth 8K.
2-49
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