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MACHINE CHECK REGISTER
The MC register consists of eight latch-
es.
Consider the setting of each latch
(Figure 3-53).
(0)
3-72
This position is set at T4 time if
there is an A-register check and
the allow-A-register-check latch
is ON.
The allow-A-register-check
latch is set on at Pl time with
certain decodings of the CA con-
trol field.
This latch is set off
at Tl time if the
suppress-A-register-check latch is
on.
Remember, when there is an
A-register check, a machine check
micro program may be entered.
It
is conceivable that the register
that caused the error may be used
in this micro program.
If further
A-register checks were not
blocked, a second error would
occur which would stop the CPU
clock.
The
suppress-A-register-check latch
blocks further A-register checks
until the D-register is gated to
the A bus.
This does not occur in
the micro program until the
registers used in the MC micro
(1)
program have been set to good
parity.
This position is set ON at T4 time
if there is a B-register check.
(2)
An MN register check sets position
2 at T4 time if the allow-write-
line is active.
This line is
active early during the read cycle
when MN has been set.
(3)
A control-register check sets
position 3 at T4 time.
(4)
MC-4 is set ON at T2 time with a
SAL parity check
(5)
position 5 is set ON to indicate a
ROAR check.
(6)
An R-register check sets position
6.
(7)
Set by an ALU check at T4 time.
Any MC register latch (0-7) that is
on, sets the first-machine-check latch
if the console check switch is set to
PROCESS.
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