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2 Sets of Nine
Inhibit Drivers
Figure 2-63.
Inhibit Driver Control
To effect inhibit driver selec-
tion, the M-register 2-
and l-bits
define in which 81< block inhibit
current is to flow.
Then the N-
register 2-bit further selects
either the nine low-order-half inhi-
bit drivers or the nine ,high-order-
half inhibit drivers.
a.
Inhibit 16-241< A.
This line
identifies the address as fall-
ing within one group of 4,096
positions of the third 81< block
of storage (MS16l).
M-Reg Not 2-Bit Controlled
M-Reg l-Bit Controlled
(not) N-Reg 2-Bit
Inhibit (from storage clock)
b.
SA-Inh
SA-Inh Line 6-Bit Al.
These are
the two ends of the inhibit
winding for the desired 4,096
positions of the 6-bit plane of
the third 81< block of storage.
For simplicity, only the 6-bit
is shown.
Nine inhibit drivers
are involved to set a byte of
data into a storage position.
Notice that the inhibit driver
is conditioned and that inhibit
current is made to flow because
there is
~
st9re 6-bit input.
Thus, a bit input prevents inhi-
bit current which allows the X-
and Y-drive lines to set the
core, whereas not-bit input
enables the inhibit driver.
When inhibit current flows, it
opposes the effect of the X-
drive current and the core is
not set (MS231).
Inhibit 16-241<
(not) Store 6-Bit
QUESTIONS ON CORE STORAGE
1.
How many wires pass through each
core?
List them.
2.
Addressing of a location in core
2-61
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