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I
ROS
CONTROL
I
CN
CH
MNEMONIC
DESCRIPTION
0
0
I
I
2
RO
3
V6NJ.
V-REGISTER POS.
6 and 7
4
STI
STATUS IN
5
OPI
OP IN
6
AC
ALU CARRY
7
SO
8
SI
9
S2
A
S4
B
S6
C
GO
D
G2
E
G4
F
G6
• EXPLAINED IN THE TEXT
Figure 3-34.
Branch Control Mnemonics
BRANCH CONTROL MNEMCNICS
Branch mnemonics are shown in Figure
3-34.
Some mnemonics require further
explanation.
3-50
FIELD
MNEMONIC
0
I
CA ..... W.
AI
SVI
R=VDD.
IBC
Z=O
G7
S3
S5
S7
Gl
G3
G5
INTR
CL
DESCRIPTION
GATE CA FIELD
TO SET W REGISTER
ADDRESS IN
SERVICE IN
TEST R REGISTER
FOR VALID DECIMAL DIGIT
ONE BIT CARRY
Z BUS
TEST FOR ANY
INTERRUPT
ACTIVATED BY
AS COL 64=1
0
I
2
3
4
5
6
7
8
9
A
B
C
D
E
F
MNEMONICS
CS
MNEMONIC
DESCRIPTIO N
LZ ... 55
LOW Z BUS EQUAL
ZERO
HIGH Z BUS EQUAL
HZ ... S4
ZERO
LZ-55,HZ~4
0- S4, 55
RESET S4, 55
TREQ ... SI
1050 REQUEST
O-SO
I-SO
o
_S2
ANSWER ON Z BUS
ANSNZ .. S2
NON ZERO
0-S6
l-S6
0 ... S7
I"'S7
FB REGISTER-MX TAGS
K- FB.
OUT
FA REGISTER-MX TAGS
K-FA.
OUT
1\
GUV_GCD
GR_GK
GR .. GF
GR_GG
SELECTOR
CHANNEL
GR-GU
REGISTERS
GR .... GV
K-GH
1/
GI_GR
K-GB
SX TAGS OUT
K-+-GA
SET SX TAGS OUT
CA->W:
The CA field is gated to set the
W-register for address changing of the
ROS word.
Example: to change from
address OjA3 to
OjB6 the expression
CA08->W is used.
parity is maintained
for the W- register by using the PK bit.
An
Xl
branch is taken.
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