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IBM 2030 Manual Of Instruction page 67

Processing unit, field engineering

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one, so that machine checks will cause
an interrupt.
In addition there is a
switch on the CE section of the system
control panel that can be used to cause
an error stop rather than have an inter-
rupt when a machine check occurs.
The
usual mode of operation is to have this
switch off and PSW bit 13 set to one.
This means that when a machine check
(such as even parity) occurs, an error
stop does not occur.
Instead a machine
interrupt occurs.
In summary then, there are three
possible courses of action when a
machine check occurs:
1.
2.
A machine interrupt; the PSW is
stored in location 0'0'48 and a new
PSW is fetched from location 0'112.
An error halt.
3.
It is ignored if PSW bit 13 is
zero.
There is one other item of informa-
tion concerning machine checks.
It is
called
log~.
Unless the machine
check is being ignored, information
concerning the status of internal cir-
cuitry is automatically placed in stor-
age starting at machine location 0'128.
This log out occurs prior to the machine
interrupt or error stop.
Just how much information is con-
tained in a log out and what it means
will depend on the particular model of
System/36O'.
However, log out always
occurs prior to a machine interrupt and
places information in storage starting
at location 0'128.
The size of this log
out area varies from 4 bytes to 256
bytes, depending on the System/36O'
model.
This information reflects the
status of the machine'S internal circui-
try.
As such it is meaningful only to
someone who has a knowledge of the
machine'S internal circuitry.
PROGRAM MASK:
Program checks (such as a
specification exception) also can cause
an interrupt.
While machine checks
cause machine interrupts, program checks
will cause a program interrupt.
On a
program interrupt, the PSW is stored in
location 0'0'40' and a new PSW:
is fetched
from location 0'0'40' and a new PSW:
is
fetched from location 0'10'4.
Program
interrupts can also be masked by use of
bits 36-39 of the PSW.
r- -
-1- --
rI~t~:
- 1 iT T - -
-II~tr~~--
-1
I
I
Iruption ILICI
Ition
I
I
I
I
Code
JCIC)
I Address
1
l __
~
____
~
______
-i-i_~
____
~
__________
J
t
t
System
Machine
Program
Mask
Check Mack
Mask
There are 15 possible exceptions
which can cause a program check (Figure
1-30') •
On occasion, four of these may not be
considered as program checks.
These
four exceptions are:
1.
Fixed Point Overflow
2.
Decimal Overflow
3.
4.
Exponent underflOW}COnCerned with
Significance
Floating Point
When one of the general registers is
being used as a counter in a program, it
may be desirable to test the counter for
an overflow.
In such cases, an overflow
should not be treated as a program
check.
As a result the program mask in
the PSW is available to the programmer
to mask program check interrupts caused
by the four exceptions mentioned earlier
as follows:
36
39
r-------,
10' 0' 0' 0'1
L _______ J
Fixed Point
t t t t
Program Mask
OVerflow -------
I
1 ---Significance
I I
I I
Decimal-----------
J
l-----Exponent
OVerflow
Underflow
All other programming exceptions
(such as specification) are always
treated as programming errors and will
always cause a program interrupt.
It is important to know which classes
of interrupts cannot be masked.
They
are the supervisor call interrupt and
program interrupts caused by all but the
four programming exceptions indicated in
bits 36-39 of the PSW.
1-63

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