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d.
Mem Sense 6-Bit 16-32R.
(Final
amplifier output MS281) •
SA 6-Bit 16-24R A
- or -
SA 6-Bit 16-24R B
STORAGE WRITE EXAMPLE
•
X- and Y- drive lines selected by
MN-register bits.
•
Clock selected by high-order bit
position of M-register and started
by write call from CPU.
•
Data from R-register activates
appropriate store circuits, allowing
2-58
X- and Y- lines to write the data
into the addressed position.
To write a byte of data into a core-
storage position, the CPU signals the
core-storage unit with a write call.
The address in the MN-register does not
change between read and write cycles.
Therefore, we can assuroe the same
address (19,851) is in the MN-register
in binary fiorm.
To write data into this
position, an X-line must be driven. a
Y-line must be driven, and the appropri-
ate inhibit lines must be driven to
cause the desired bit configuration to
be set into the position addressed by
the X- and Y- lines.
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