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IBM 2030 Manual Of Instruction page 40

Processing unit, field engineering

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Register to Register:
,---T---'
I
Op
1
I
ICodet
I
'-__ ..&._J
storage to Register:
r--T---T--------,
I
Cp I
I
I
I
Code I
I
I
l ____ ..&.---..&.-______
J
storage to Storage:
r----T--T------~---,
lOp
J
I
' I
,Code
I
I
I
I
l ___
,..&.---..&.------..&.-· __ J
I
t
I
I
' -__ J
l ________ J
Byte
Halfword
Above you can see the three instruc-
tion lengths which are used depending on
the location of data.
One thing to note
is that the first or high order byte of
each instruction contains the Op Code.
Op codes in the System/360 give
specific information:
1.
The Op Code specifies the operation
such as Add, Subtract or Branch.
2.
3.
The Op Code specifies whether the
data is va.riable or fixed in
length.
The Op Code specifies whether the
data is in binary or decimal
format.
4.
The Op Code specifies whether the
operands are in main storage or
general registers.
The Op Code
does not give the address of data.
It only indicates the data is in
main storage, in general registers
or in floating point registers.
5.
The Op Code specifies the length of
the instruction.
As you can see, there is much infor-
mation in the 8 bits which make up the
Op Code.
So
let's break the Op Code
Byte down and see how it gives us this
information.
1-36
The Op Code
-----One Byte----
,--------------,
10
1 2
3 4 5 6 7\
l _______________ J
Bits 0 and 1 of the Op Code specifies
whether data is in main storage, in the
general registers, or in floating point
registers.
Because the instruction
length depends on the location of the
data, the instruction length is also
specified by bits 0
+ 1
of the Op Code.
There are four possible combinations
of bits 0, 1 of the Op Code:
00, 01,
10, 11.
If both bits are zero (00),
both operands are in general registers
or floating pOint registers and the
instruction is one halfword in length.
If bits 0,
1
of the Op Code are either
01 or 10, only one of the operands may
be in main storage and the instruction
is
2
halfwords in length.
If both bits
are one (11), both operands are in main
storage and the instruction is 3 half-
words words in length.
Quite often the Op Code Byte is
referred to as two hexadecimal digits
rather than eight binary bits.
Some
examples of hexadecimal Op Codes, their
binary equivalent, and their instruction
length, are shown below.
Actual
~
Op Code
Length in
Halfwords
SA
01011010
4A
01001010
FA
11111010
18
00011000
58
01011000
94
10010100
Two Halfwords
Two Halfwords
Three Halfwords
One Halfword
Two
H~lfwords
Two Halfwords
GENERAL REGISTER ADDRESSING
A general register has a 4 bit
address.
To address a general register, its
address (0000 to 1111) is placed in
the correct position of the instruc-
tion.
At this point, you should have a good
idea of how the Op Code of an instruc-

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