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IBM 2030 Manual Of Instruction page 320

Processing unit, field engineering

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ed I/O unit wants to transmit or
receive data.
SEL OUT - When this light is on, the
several I/O units are being polled
to determine whether any unit
requests service.
ADDR OUT - Indicates that the infor-
mation on Bus Out is an address.
CMND OUT - Indicates that the infor-
mation on BUS Out is a command.
SERV OUT - Indicates that the CPU
has accepted the information on
Bus In or has provided data on Bus
Out.
SUPP OUT - This signal used alone or
with other tags provides the fol-
lowing functions:
Suppress Status
Suppress Data Transfer
Chained Command Control
Selective Reset
BASIC CPU DISPLAY
A display of registers, status con-
ditions, and checks in the CPU.
Those registers with full time indi-
cators are:
MPX Channel Bus-Out Register 9 bits
Main Storage Address
Register
18 bits
Main Storage Data
Reg.i.ster
9
bits
B Register
9
Bits
A Register
9
Bits
ALU Output
(not a register)
9
Bits
Whenever a storage cycle is taken, an
address is gated into the Storage
Address Register, and one of two indica-
tors will
be
turned on to indicate
whether the access is in Main Storage or
Auxiliary Storage (Local Storage or one
of the MPX Storages).
These lamps are
labeled MAIN STOR and AUX STOR, respec-
tively_
If an access to Auxiliary Stor-
age is required, the contents of the
high order digit of the Main Storage
Address Register will determine which
part of the Auxiliary Storage is to be
used.
During wait state and process stop,
the instruction counter is displayed in
6-8
the B and A registers.
The current
operation code is not displayed.
CPU STATUS
These indicators Signal the actual
operating status of the CPU at any
time.
Description
The indicators and their meanings are:
EX:
This lamp is turned on at the end
of each instruction execution, that is,
whenever the micro-instruction -Branch
on Interrupt- occurs.
In the micro-
instruction word immediately following
the interrupt word, the EX latch is
reset.
Note that if the system stops at
the end of instruction execution (for
example, if the Stop button has
pressed), the EX lamp remains on.
It is
extinguished upon restarting the CPU
clock.
MATCH:
Some modes of operation require
the use of an exclusive or match
ci~cuit,
and the MATCH indicator is
turned on whenever the Compare Address
in switches A, B, C, and D matches the
contents of either the R/W Storage
Address Register or the Read/Only Stor-
age Address Register.
The position of
the Address Compare Switch determines
which of these registers is monitored,
as well as the system response to a
match.
ALLOW WRITE:
Whenever the allow write
indicator is on,the R/W Storage has
completed a read operation, but not the
corresP9nding write operation.
1050 INTV:
This light is turned on
whenever operator intervention is
required at the 1050.
1050 REQ:When this light is on, the
CPU has recognized a request for service
that was initiated at the 1050.
MPX CHNL:
Whenever a multiplex channel
share request is recognized by the CPU,
the MPX light is turned on.
This light
is turned off at the completion of the
share cycle.

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