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ADDRESS 0100:
The expression IJ->MN MS
on the S line will bring up control
lines to read the first byte of the in-
struction from core storage.
The
address in the
1-
and J-registers is set
into the
MN
register.
Main storage is
specified by MS on this line.
Once core
has been addressed to read out the first
byte, the address in IJ can be updated
for reading the next byte of the
instruction.
To be more explicit, only
the J-register need be increased by the
value of one because all instructions
start at an even address.
Assume that byte 510 in main storage
is to be addressed by the
1-
and J-
registers.
The
1-
and J- registers will
then contain the address
I
J
00000001
1111~110.
To address byte 511 it is only necessary
to add the value of
1
to the J-register.
The registers now contain
I
J
00000001
11111111.
Notice that, should the value of 1 be
added to the J-register again, the
resultant address in I and J is 00000001
00000000, or 256.
Thus, if the value
1
is added to the J-register when it is
odd, it is necessary to take into
account the possibility of a carryout
which might affect the I-register
address.
There can be no carryout when
adding
1
to the
J~register
address when
the J-address is an even number.
The statement in the ROS word to
update the J-register is J
+
0
+
1
->J.
The A-register input of ALU IS SET WITH
the data in the J-register.
Zeros are
set into the E-register.
The
1
in the
expression is a carry insert.
The addi-
tion becomes:
J data
=
A-register
00000000
=
B-register
+
1
=
Carry insert
J data
+
1
=
A.LU output
The arithmetic statement can be
thought of as being in the format: A-
input
+
B-input
+
Carry is set into
3-26
Destination.
It is not necessary to
have all portions of this format.
The
expression G->J, for example, brings up
the control lines to set the G-register
data to the A-register input.
The B-
register input and carry insert
pOSitions are zero.
The expression on the C line is
0->S7.
This statement brings up control
lines to set position 7 of the S reg-
isterto O.
The function performed by
this statement has little bearing on our
operation.
It is used in an indexing
routine for RX format, which is many ROS
words away.
This brings up an important
point: in any ROS word, a statement such
as 0->S7 may be used that seems to have
no relation to what is being done. HoW-
ever, it may be used further in the
micro program and should not be ignored.
The expression on the R line is S2,1.
Ren,ember that when the box format was
discussed, this line was used for
branching_
If you look at the output
line from this box, you will see that
there are two RCS words that may be
executed next.
They are the ROS words
at addresses 0109 or 010B.
The expres-
sion S2, 1 must somehow control a deci-
sion circuit.
The convenient place to
make this decision is the ROAR address
it self.
The two low-order pOSitions of
ROAR, X6 and X7, are controlled for
branching purposes.
To see how this is
done, first convert the addresses of the
two ROS wordS to binary.
XX
67
Address 0109 in binary is 0001 0000 1001
Address 010B in binary is 0001 0000 1011
Cn the R line, the left portion of
the expression controls the X6 position
of ROAR.
To carry this one step
further, the S2 portion of the expres-
sion will determine the status of X6.
Since position 2 of the S register is
zero, the X6 pOSition of ROAR will be
set to O.
The 1 in the expression
(S2,1) forces the X7 position of ROAR to
a one.
A 01 branch is taken to
address 0109.
Notice that on the top
line of the box for address 0109 you see
01.
These are the two low-order bits of
the actual address.
Had position
2
of
the S register been set, X6 would be set
to a one and a 1,1 branch would be exe-
cuted to address 010B.
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