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In Figure 3-36 notice the addresses
on ROS board O.
Each small block rep-
resents two ROS word addresses.
The
decimal addresses on this first board
are 0000 through 0095.
These addresses
are contained in the 48 blocks which
represent our units of selection, driv-
ers.
Note at this time, that a 3 by 16
matrix is used.
An even address in ROAR selects that
address and the .next high-order odd
address.
An
odd address in ROAR selects
that address and the next lower even
address.
As an example: If ROAR con-
tains the decimal address 0057, this
address and address 0056 are selected.
However, only the ROS word at address
0057 is gated to the sense amplifier
latches.
ADDRESSING PRINCIPLES
•
A driver is selected by the coinci-
dence of a T line and a driver
decode line.
•
•
•
There are 16 T lines, TO througb
T15, in a 4R module.
A driver decode line provides half
selection for 32 addresses.
ROAR consists of
15
latches,
13
are
used for addressing and 2 for
parity.
Assume that ROAR contains the address of
the ROS word at location 0112.
The
binary value in ROAR that represents
this address is: 0001011001·000.
This
value is shown in the small table in
Figure 3-36.
Address 0712 is found on
ROS board 7.
The horizontal line to
this address is developed f.rom the T
switch.
The vertical line to this block
is developed from switch A, poSition 6.
See Figure 3-36
(j).
The lines from
switches A, Band C are the driver
decode lines.
Remember, both a T line
and a driver decode line are necessary
for full driver selection.
To see why line 6 from switch A is
used, see the chart in this figure.
ROAR consists of 15 latches.
The W
portion consists of 5 latches, the X
portion 8.
Two latches are used to
maintain parity.
The darkened portion,
XO, Xl, and X2 positions of ROAR provide
selection for the A switches.
If binary
weights are given to these positions, as
shown on the conversion line, then the
result is:
POSition
Value
Conversion
XO
=
1
=
4
Xl
=
1
=
2
X2
=
0
=
+
0
-----
6
Note:
If a bit value is a one, use
~number
below it on the conversion
line.
Because there is an A switch for
every 256 addresses, further selection
is necessary.
This is done by switch B,
a>
in Figure 3-36.
With switch B at
position 2, our selection narrows to the
third group of 256 address in each 1R
unit of words.
The B switch is con-
trolled by positions W6 andW1 of ROAR.
Again, using the bit value and conver-
sion line, our result becomes:
Position
W6
W1
=
ValUe
1
o
=
=
Conversion
2
+ 0
-----------------------------------------
2nd
position
of
switch B
This is all well and good, but remember
that there is a switch B for each 1R
unit of words.
This decoding is dupli-
cated three more times for a 4R module.
Swi tch C
G>
in Figure
3~36
is used to
select which lR unit contains our
desired address.
This decoding is con-
trolled by the W4 and W5 pOSitions of
ROAR.
Since the bit values of these
pOSitions is zero, the conversion values
are not used and position 0 of switch C
is active.
If you are wondering why
there are only four poSitions of switch
C even though the maximum amount of
storage is SR. it is because the selec-
tion that determines whether our address
is in the first
4K
module or the second
4R module is made elsewhere.
Let's review for a moment.
The driv-
er for address 0712 and 0713 requires 2
inputs for full selection.
One of these
inputs is developed through switches A,
B, and C.
Switch C determines that our
3-55
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