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FUNCTION
Read Basic
8K
Write Basic 8K
X2
Address
Read 2nd
8K
Select
and Drive
Write 2nd
8K
Y2
Address
Select
and Drive
DRIVERS ON
XI
YI
X2
Y2
XI
Y2
X2
YI
XI
Address
Select
and Drive
YI
Address
Select
and Drive
'------------v~-------------
'-------------y~-------------
Second 8K
Phase Reversal Plane
Basic 8K
Y Lines go through
Figure 2-57.
Phase Reversal
X
Lin~
do not,
When the addressing circuitry selects
and drives one X- and one Y-drive line,
two storage positions (18 cores) are
addressed.
However, the drive currents
are in pbase in one 8K section and out-
of-phase in the other 8K section.
Reversing the direction of one of the
drive currents causes the drive currents
to be in phase in the second 8K section.
Reading and writing are controlled by
reversing both drive currents as shown
in Figure 2-57.
To read out a core-
storage position in the first
aK
block,
drivers labeled Xl and Yl are caused to
supply drive current while the circuitry
at the other ends of the drive lines
accepts these currents.
The result is
in-phase read current in the desired
position in the basic 8K block.
To
write into the same position, drivers X2
and Y2 supply drive current and
circuitry at the opposite end provides a
path for these currents.
The result is
in-phase write currents in the desired
position in the basic 8K block.
To read out a core-storage position
in the second 8R block, drivers Xl and
Y2 are turned on.
Circuitry at the
opposite ends of the drive lines is
conditioned to complete the drive cur-
2-48
rent paths.
The result is in-phase read
current in the desired position- of the
additional 8K block.
Notice that the
corresponding position in the basic 8X
block is not affected because the read
currents in this block are out-of-
phase.
Writing into a core-storage position
in the second 8K block requires drivers
X2 and Yl to be turned on.
Circuitry at
the opposite ends of the drive lines
must be conditioned to accept drive
current.
The result is in-phase write
current in the position in the addition-
al
ax
block.
Once again, the corres-
ponding position in the basic 8K block
is not affected because the write cur-
rents in this block are out-of-phase.
Notice in Figure 2-51 that the
X1-driver is turned on for each read
cycle while the X2-driver is turned on
for each write cycle.
The Yl-driver is
turned on for a read cycle in the basic
8R or for a write cycle in the second
8X.
The Y2-driver is turned on for a
write cycle in the basic 8X or for a
read cycle in the second 8K.
The
desired 8K block is selected by using
the M-register 2-bitposition in combi-
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