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High
0111
Low
0101.
Next, the output from the A- register is
crossed (X) so that the. data is
High
Low
0101
0111.
The data is further controlled by the
(H).
The H specifies that only the high
portion of the data is to be used as A
source data.
The A source data to ALU
then becomes, 0101 0000.
The B source input to ALU is
controlled by the (XL) portion of the
expression.
R represents a value in the
CR ROS control field.
The constant is
3
and is shown in binary form on the
E
line of this CAS block.
The a-register
is set with the data 0011 0011.
Only
the low portion (L) of the
B-
register
data is gated to ALU.
The B source data
is 0000 0011.
The result of adding the
B
source
data to the A source data is set into
the V-register.
A source data
+
B source data
= 0101
0000
=
0000
0011
Reg 5 Byte 3
V-register data
=
0101
0011
On the R line the branch expressions
are 1,53.
Remember, 53 was set to a one
when the J-register was updated to indi-
cate a carryout condition.
This expres-
sion sets X6 and X7 to 1,1 and a branch
is executed to address 0127.
ADDRESS 0127:
The only function per-
formed by this ROS word is 1
+
0
+
1->1
Didn't we say earlier that when the
J-register data had the value of one
added to it and a carryout resulted,
that the I-register must also be
updated?
On the branch line, an unconditional
1,0 branch is taken to address 0126.
ADDRESS 0126:
We have seen how the
branch to this address from address 0127
was set up.
We could have branched to
this step from address 011D.
Had S3 at
address 011D not been set, a 1,0 branch
would have been set up to this address.
The arithmetic statement DH + RL->T
sets up the units address of register 7
in the T-register.
Again let's consider
the first portion of this expression,
DH.
The A-register is set with the data
in the D-register
High
Low
0111
0101.
Only the. high portion
(H)
is presented
to ALU.
A source data is therefore,
0111 0000.
Again, the expression KL
brings up the control lines to use the
CR
field constant of 3.
The B source
data is 0000 00t1 because only the low
portion (L) is gated to ALU.
A source data
+
B source data
=
0111
0000
=
0000
0011
~-----------------------------------~---
Reg 7 Byte 3
T-register data
=
0111
0011
The G-register positions 4 and 5 are
now tested for further decoding of the
Op code.
G 4 is set to a 1.
G 5 is set
to a O.
Therefore, 1,0 branch is exe-
cuted to address 0122.
This address is
in Figure 3-25 at coordinates C2.
Our
Op code, as a result of checking G 4 and
G 5, must either be LOAD, COMPARE, ADD,
or SUBTRACT.
3-29
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