Iic Bus - Xilinx ML605 Hardware User's Manual

15. IIC Bus

The ML605 implements four IIC bus interfaces at the FPGA.
The "MAIN" IIC bus hosts four items:
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The "DVI" IIC bus hosts two items:
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The "LPC" IIC bus hosts two items:
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The "SFP" IIC bus hosts two items:
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The ML605 IIC bus topology is shown in
ML605 Hardware User Guide
UG534 (v1.9) February 26, 2019
FPGA U1 Bank 34 "MAIN" IIC interface
8Kb NV Memory U6
FMC HPC connector J64
DDR3 SODIMM Socket J1
FPGA U1 Bank 34 "DVI" IIC interface
DVI codec U38 and DVI connector J63
FPGA U1 Bank 33 "LPC" IIC interface
FMC LPC connector J63
FPGA U1 Bank 13 "SFP" IIC interface
SFP module connector P4
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Figure 1-14.
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