Xilinx ML605 Hardware User's Manual page 75

Fan Controller
In highly demanding situations, active thermal management in the form of a heat sink and
fan may be required. In order to support this, drive circuitry for an external fan has been
provided on the ML605. A fan with tach output can be connect at header J59 as shown in
Figure
to close the control loop and regulate the fan speed. Alternatively, the FPGA temperature
as recorded by the System Monitor can be used to close the PWM control loop for the fan.
X-Ref Target - Figure 1-32
ML605 Hardware User Guide
UG534 (v1.9) February 26, 2019
1-32. The fan PWM signal is generated by the FPGA and the tach input can be used
J59
GND
12V
Tach
VCC2V5
R369
10.0K
1%
1/16W
SM_FAN_PWM
Figure 1-32: ML605 Fan Driver
www.xilinx.com
VCC12_P
R367
10.0K
1%
1
1/16W
2
3
2
4
Q24
NDT3055L
0
3
1
Detailed Description
SM_FAN_TACH
R358
4.75K
1%
UG534_39 _081209
75
Send Feedback