Xilinx ML605 Hardware User's Manual page 3

Date Version
10/12/10 1.4
02/15/11 1.5
07/18/11 1.6
06/19/12 1.7
10/02/12 1.8
02/26/19 1.9
UG534 (v1.9) February 26, 2019
Updated description of Fusion Digital Power Software in
Revised note in Table 1-6. Revised oscillator manufacturer information from Epson to
SiTime on page page 14, page 30
Corrected "jitter" to "stability" in section
table notes in Table 1-31. Revised the FPGA U1 Pins for
IIC_SCL_MAIN in Table 1-18.
Added [Ref 4] link to Oscillator
2.5V). Revised Figure 1-10.
Updated Figure 1-2. Added
Updated Appendix C, Xilinx Design
Compliance Information, and the
www.xilinx.com
Revision
and page 88.
Oscillator (Differential). Added
(Differential). Revised
Regulatory and Compliance
Constraints, Appendix D, Regulatory and
2. 512 MB DDR3 Memory SODIMM
Onboard Power Regulation.
Table 1-32, and
IIC_SDA_MAIN and
Oscillator Socket (Single-Ended,
Information.
section.
ML605 Hardware User Guide