Usb-To-Uart Bridge - Xilinx ML605 Hardware User's Manual

Chapter 1: ML605 Evaluation Board

12. USB-to-UART Bridge

The ML605 contains a Silicon Labs CP2103GM USB-to-UART bridge device (U34) which
allows connection to a host computer with a USB cable. The USB cable is supplied in this
evaluation kit (Type A end to host computer, Type Mini-B end to ML605 connector J21).
Table 1-14
Xilinx UART IP is expected to be implemented in the FPGA fabric (for instance, Xilinx
UART
(TX), Receive (RX), Request to Send (RTS), and Clear to Send (CTS).
Silicon Labs provides royalty-free Virtual COM Port (VCP) drivers which permit the
CP2103GM USB-to-UART bridge to appear as a COM port to host computer
communications application software (for example, HyperTerm or TeraTerm). The VCP
device driver must be installed on the host PC prior to establishing communications with
the ML605. Refer to the evaluation kit Getting Started Guide for driver installation
instructions.
Table 1-14: USB Type B Pin Assignments and Signal Definitions
USB Connector
Table 1-15: USB-to-UART Connections
Refer to the
drivers.
In addition, see some of the Xilinx UART IP specifications at:
•
•
42
Send Feedback
details the ML605 J21 pinout.
Lite). The FPGA supports the USB-to-UART bridge using four signal pins: Transmit
Signal Name
Pin
1 VBUS
2 USB_DATA_N
3 USB_DATA_P
4 GROUND
UART function
U1 FPGA Pin
in FPGA
T24 RTS, output
T23 CTS, input
J25 TX, data out
J24 RX, data in
Silicon Labs website for technical information on the CP2103GM and the VCP
(DS571) [Ref 22]
XPS UART Lite
XPS 16550 UART (DS577)
www.xilinx.com
+5V from host system (not used)
Bidirectional differential serial data (N-side)
Bidirectional differential serial data (P-side)
Schematic Net U34 CP2103GM
Name
USB_1_CTS
USB_1_RTS
USB_1_RX
USB_1_TX
[Ref 23]
Description
Signal ground
UART Function
Pin in CP2103GM
22 CTS, input
23 RTS, output
24 RXD, data in
25 TXD, data out
ML605 Hardware User Guide
UG534 (v1.9) February 26, 2019
XPS