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14. IIC Bus with 4-Kb EEPROM
An IIC EEPROM (Microchip Technology 24LC04B-I/ST) is provided on the ML40x board
to store non-volatile data such as an Ethernet MAC address. The EEPROM write protect is
tied off on the board to disable its hardware write protect. The IIC bus uses 2.5V signaling
and can operate at up to 400 kHz. IIC bus pull-up resistors are provided on the board.
The IIC bus is extended to the expansion connector so that the user may add additional IIC
devices and share the IIC controller in the FPGA. If the expansion IIC bus is to be utilized,
the user must have additional IIC pull-up resistors present on the expansion card.
Bidirectional level shifting transistors allow the expansion card to utilize 2.5V to 5V
signaling on IIC.
15. VGA Output
The VGA output port (P2) supports an external video monitor.
and its corresponding video DAC chip.
Table 13: Video DAC Connections
Note:
significant bits of digital RGB data are connected to the video DAC. The three least significant bits of
digital RGB data are pulled Low.
16. PS/2 Mouse and Keyboard Ports
The ML40x evaluation platform contains two PS/2 ports: one for a mouse (J17) and the
other for a keyboard (J18). Bidirectional level shifting transistors allow the FPGA's
2.5V I/O to interface with the 5V I/O of the PS/2 ports. The PS/2 ports on the board are
powered directly by the main 5V power jack, which also powers the rest of the board.
www.BDTIC.com/XILINX
ML401/ML402/ML403 Evaluation Platform
UG080 (v2.5) May 24, 2006
Board
Speed
ML401
50 MHz
24-bit video data bus
connected to FPGA
ML402
140 MHz
15-bit video data bus
ML403
connected to FPGA
Due to the reduced pin count on ML403 board's XC4VFX12 FPGA, only the five most
Caution!
Care must be taken to ensure that the power load of any attached PS/2 devices does
not overload the AC adapter.
www.xilinx.com
Description
Analog Devices ADV7125KST50
Analog Devices ADV7125KST140
Detailed Description
Table 13
lists each board
Video Monitor
25
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