Table of Contents
Advertisement
Chapter 1: XM101
3. PCA9543 IIC Bus Switch
The XM101 IIC bus hosts two components, U3 M24C02 2Kb EEPROM and U4 IIC bus
switch
X-Ref Target - Figure 1-5
Table 1-7
Table 1-7: IIC Address Table
The IIC bus switch provides bidirectional bus isolation and isolates the fixed addresses of
the two Si570 devices from the main IIC bus of the board. The upstream side of the switch
connects to the FMC HPC connector. The downstream switch ports interface to the two
Silicon Laboratories clock integrated circuits.
The PCA9543 is a bidirectional translating switch, controlled by the upstream board side
IIC bus. The PCA9543 must be initialized prior to attempting to communicate with the two
Si570 clock circuits on the downstream IIC buses.
The PCA9543 component data sheet contains detailed application information and is
available online at www.nxp.com.
The IIC address of this component is controlled by a combination of the board interface
and chip enable connections to the component inputs on the XM101. Signals GA0 and GA1
from the board are connected to the two address inputs A1 and A0 of the PCA9543
component. Xilinx boards provide GA0 and GA1 signal strapping to 3.3V and GND
signals creating different A0 and A1 address decodes on the PCA9543.
The IIC memory addressing protocol requires a bus master to initiate communication to a
peripheral device using a start condition followed by a device select code. The device select
code consists of a 4 bit Device Type Identifier and a 3-bit Address (A2, A1 and A0). A2 is
internally grounded inside the PCA9543. Bit 0 is used to indicate read/write. The Device
Type Identifier for the PCA9543 is 1110 binary.
18
(Figure
1-5).
IIC BUS SDA, SCL
Figure 1-5: XM101 IIC Bus Topology
shows the addresses for the IIC components.
Component
M24C02 (U3)
PCA9543 (U4)
SI570 (U1)
SI570 (U2)
www.xilinx.com
U3
2 K b
EEPROM
U4 IIC
Switch
SDA_0,
SCL_0
U1
CLK0_M2C_P
Si570
CLK0_M2C_N
SDA_1,
SCL_1
U2
CLK2_M2C_P
Si570
CLK2_M2C_N
UG538_05_010610
Address
1010_0_GA0_GA1_RW
1110_0_GA0_GA1_RW
1011_1_0_1_RW
1011_1_0_1_RW
Table 1-8, page 19
defines the generic
FMC XM101 User Guide
UG538 (v1.1) September 24, 2010
Advertisement
Table of Contents
