Chapter 1:
ML605 Evaluation Board
FPGA INIT and DONE LEDs
The typical Xilinx FPGA power up and configuration status LEDs are present on the
ML605.
The red INIT LED DS31 comes on momentarily after the FPGA powers up and during its
internal power-on process. The DONE LED DS13 comes on after the FPGA programming
bitstream has been downloaded and the FPGA successfully configured.
X-Ref Target - Figure 1-17
FPGA INIT B
Table 1-20: FPGA INIT and DONE LED Connections
17. User I/O
The ML605 provides the following user and general purpose I/O capabilities:
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VCC2V5
1
1
R3
27.4
1%
2
1/16W
Figure 1-17: FPGA INIT and DONE LEDs
FPGA U1 Pin
Schematic Net Name
P8
FPGA_INIT_B
R8
FPGA_DONE
User LEDs (8) with parallel wired GPIO male pin header
User Pushbutton (5) switches with associated direction LEDs
CPU Reset pushbutton switch
User DIP switch (8-pole)
User SMA GPIO
LCD Display (16 char x 2 lines)
www.xilinx.com
Q14
FPGA_DONE
NDS336P
Controlled LED
DS31 INIT, Red
DS13 DONE, Green
VCC2V5
1
R419
330
5%
2
1/16W
1
R4
27.4
1%
2
1/16W
UG534_17_050510
ML605 Hardware User Guide
UG534 (v1.9) February 26, 2019