Xilinx ML605 Hardware User's Manual page 28

Chapter 1: ML605 Evaluation Board
Table 1-6
Table 1-6: System ACE CF Connections
Notes:
1. The System ACE CF clock is sourced from U28 33.000 MHz osc.
See the
and the System ACE CompactFlash Solution Data Sheet (DS080).
28
Send Feedback
lists the System ACE CF connections.
U1 FPGA Pin Schematic Net Name
AM15 SYSACE_D0
AJ17 SYSACE_D1
AJ16 SYSACE_D2
AP16 SYSACE_D3
AG16 SYSACE_D4
AH15 SYSACE_D5
AF16 SYSACE_D6
AN15 SYSACE_D7
AC15 SYSACE_MPA00
AP15 SYSACE_MPA01
AG17 SYSACE_MPA02
AH17 SYSACE_MPA03
AG15 SYSACE_MPA04
AF15 SYSACE_MPA05
AK14 SYSACE_MPA06
AJ15 SYSACE_MPBRDY
AJ14 SYSACE_MPCE
L9 SYSACE_MPIRQ
AL15 SYSACE_MPOE
AL14 SYSACE_MPWE
AC8 SYSACE_CFGTDI
AE8 FPGA_TCK
AD8 FPGA_TDI
AF8 FPGA_TMS
AE16 CLK_33MHZ_SYSACE
System ACE CF product
www.xilinx.com
U19 XCCACETQ144I
Pin Number
66
65
63
62
61
60
59
58
70
69
68
67
45
44
43
39
42
41
77
76
81
80
82
85
(1)
93
page, System ACE file generation information, and the
Pin Name
MPD00
MPD01
MPD02
MPD03
MPD04
MPD05
MPD06
MPD07
MPA00
MPA01
MPA02
MPA03
MPA04
MPA05
MPA06
MPBRDY
MPCE
MPIRQ
MPOE
MPWE
CFGTDI
CFGTCK
CFGTDO
CFGTMS
CLK
[Ref 18]
ML605 Hardware User Guide
UG534 (v1.9) February 26, 2019