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Table 20-1. Hardware Statuses After Reset Acknowledgment (1/3)
Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM
Data memory
General-purpose registers
Port registers (P0 to P7, P12 to P14) (output latches)
Port mode registers (PM0, PM1, PM3 to PM7, PM12, PM14)
Pull-up resistor option registers (PU0, PU1, PU3 to PU5, PU7, PU12, PU14)
Input switch control register (ISC)
Internal memory size switching register (IMS)
Internal expansion RAM size switching register (IXS)
Processor clock control register (PCC)
Ring-OSC mode register (RCM)
Main clock mode register (MCM)
Main OSC control register (MOC)
Oscillation stabilization time select register (OSTS)
Oscillation stabilization time counter status register (OSTC)
16-bit timer/event
Timer counters 00, 01 (TM00, TM01)
Note 3
counters 00, 01
Capture/compare registers 000, 010, 001, 011 (CR000, CR010, CR001, CR011)
Mode control registers 00, 01 (TMC00, TMC01)
Prescaler mode registers 00, 01 (PRM00, PRM01)
Capture/compare control registers 00, 01 (CRC00, CRC01)
Timer output control registers 00, 01 (TOC00, TOC01)
8-bit timer/event
Timer counters 50, 51 (TM50, TM51)
counters 50, 51
Compare registers 50, 51 (CR50, CR51)
Timer clock selection registers 50, 51 (TCL50, TCL51)
Mode control registers 50, 51 (TMC50, TMC51)
8-bit timers H0, H1
Compare registers 00, 10, 01, 11 (CMP00, CMP10, CMP01, CMP11)
Mode registers (TMHMD0, TMHMD1)
Carrier control register 1 (TMCYC1)
Watch timer
Operation mode register (WTM)
Notes 1.
During reset input or oscillation stabilization time wait, only the PC contents among the hardware statuses
become undefined. All other hardware statuses remain unchanged after reset.
2.
When a reset is executed in the standby mode, the pre-reset status is held even after reset.
3.
16-bit timer/event counter 01 is available only for the
and 78F0138HD.
4.
8-bit timer H1 only.
CHAPTER 20 RESET FUNCTION
Hardware
Note 4
µ
PD78F0133H, 78F0134H, 78F0136H, 78F0138H,
User's Manual U16899EJ2V0UD
Status After Reset
Note 1
Acknowledgment
The contents of the
reset vector table
(0000H, 0001H) are
set.
Undefined
02H
Note 2
Undefined
Note 2
Undefined
00H (undefined only
for P2)
FFH
00H
00H
CFH
0CH
00H
00H
00H
00H
05H
00H
0000H
0000H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
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