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(4) Main OSC control register (MOC)
This register selects the operation mode of the high-speed system clock.
This register is used to stop the high-speed system clock oscillator operation when the CPU is operating with the
Ring-OSC clock. Therefore, this register is valid only when the CPU is operating with the Ring-OSC clock.
MOC can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Address: FFA2H
After reset: 00H
Symbol
<7>
MOC
MSTOP
MSTOP
0
1
Cautions 1. Make sure that bit 1 (MCS) of the main clock mode register (MCM) is 0 before
CHAPTER 5 CLOCK GENERATOR
Figure 5-5. Format of Main OSC Control Register (MOC)
R/W
6
5
0
0
Control of high-speed system clock oscillator operation
High-speed system clock oscillator operating
High-speed system clock oscillator stopped
setting MSTOP.
2. To stop high-speed system clock oscillation when the CPU is operating on the
subsystem clock, set bit 7 (MCC) of the processor clock control register (PCC) to
1 (setting by MSTOP is not possible).
User's Manual U16899EJ2V0UD
4
3
2
0
0
0
1
0
0
0
115
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