External Event Counter Operation - NEC MuPD78F0132H User Manual

6.4.4 External event counter operation

Setting
The basic operation setting procedure is as follows.
<1> Set the CRC0n register (see Figure 6-31 for the set value).
<2> Set the count clock by using the PRM0n register.
<3> Set any value to the CR00n register (0000H cannot be set).
<4> Set the TMC0n register to start the operation (see Figure 6-31 for the set value).
Remarks 1. For the setting of the TI00n pin, see 6.3 (5) Port mode register 0 (PM0).
2. For how to enable the INTTM00n interrupt, see CHAPTER 17 INTERRUPT FUNCTIONS.
The external event counter counts the number of external clock pulses input to the TI00n pin using 16-bit timer
counter 0n (TM0n).
TM0n is incremented each time the valid edge specified by prescaler mode register 0n (PRM0n) is input.
When the TM0n count value matches the 16-bit timer capture/compare register 00n (CR00n) value, TM0n is
cleared to 0 and the interrupt request signal (INTTM00n) is generated.
Input a value other than 0000H to CR00n (a count operation with 1-bit pulse cannot be carried out).
Any of three edgesrising, falling, or both edgescan be selected using bits 4 and 5 (ES0n0 and ES0n1) of
prescaler mode register 0n (PRM0n).
Sampling is performed using the internal clock (f
TI00n pin is detected twice, thus eliminating noise with a short pulse width.
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
) and an operation is only performed when a valid level of the
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