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(4) Clock selection register 6 (CKSR6)
This register selects the base clock of serial interface UART6.
CKSR6 can be set by an 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Remark CKSR6 can be refreshed (the same value is written) by software during a communication operation
(when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5 (RXE6) of ASIM6
= 1).
Address: FF56H After reset: 00H R/W
Symbol
7
CKSR6
0
TPS63
0
0
0
0
0
0
0
0
1
1
1
1
Notes 1.
Be sure to set the base clock so that the following condition is satisfied.
• V
= 4.0 to 5.5 V: Base clock ≤ 10 MHz
DD
• V
= 3.3 to 4.0 V: Base clock ≤ 8.38 MHz
DD
• V
= 2.7 to 3.3 V: Base clock ≤ 5 MHz
DD
• V
= 2.5 to 2.7 V: Base clock ≤ 2.5 MHz
DD
2.
Note the following points when selecting the TM50 output as the base clock.
• PWM mode (TMC506 = 1)
Start the operation of 8-bit timer/event counter 50 first and then set the count clock to make the duty
= 50%.
• Mode in which the count clock is cleared and started upon a match of TM50 and CR50 (TMC506 = 0)
Start the operation of 8-bit timer/event counter 50 first and then enable the timer F/F inversion
operation (TMC501 = 1).
It is not necessary to enable the TO50 pin as a timer output pin in any mode.
Cautions 1. When the Ring-OSC clock is selected as the clock to be supplied to the CPU, the clock of the
Ring-OSC oscillator is divided and supplied as the count clock. If the base clock is the Ring-
OSC clock, the operation of serial interface UART6 is not guaranteed.
2. Make sure POWER6 = 0 when rewriting TPS63 to TPS60.
CHAPTER 14 SERIAL INTERFACE UART6
Figure 14-8. Format of Clock Selection Register 6 (CKSR6)
6
5
0
0
TPS62
TPS61
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
0
0
0
0
0
1
0
1
Other than above
User's Manual U16899EJ2V0UD
4
3
0
TPS63
TPS62
TPS60
Base clock (f
0
f
(10 MHz)
X
1
f
/2 (5 MHz)
X
2
0
f
/2
(2.5 MHz)
X
3
1
f
/2
(1.25 MHz)
X
4
0
f
/2
(625 kHz)
X
5
1
f
/2
(312.5 kHz)
X
6
0
f
/2
(156.25 kHz)
X
7
1
f
/2
(78.13 kHz)
X
8
0
f
/2
(39.06 kHz)
X
9
1
f
/2
(19.53 kHz)
X
10
0
f
/2
(9.77 kHz)
X
Note 2
1
TM50 output
Setting prohibited
2
1
0
TPS61
TPS60
Note 1
) selection
XCLK6
299
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