NEC MuPD78F0132H User Manual page 253

(4) Power-fail comparison mode register (PFM)
The power-fail comparison mode register (PFM) is used to compare the A/D conversion result (value of the
ADCR register) and the value of the power-fail comparison threshold register (PFT).
PFM can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Figure 12-7. Format of Power-Fail Comparison Mode Register (PFM)
Address: FF2AH
Symbol
PFM
Caution If data is written to PFM, a wait cycle is generated. Do not write data to PFM when the CPU is
operating on the subsystem clock and the high-speed system clock is stopped. For details, see
CHAPTER 32 CAUTIONS FOR WAIT.
(5) Power-fail comparison threshold register (PFT)
The power-fail comparison threshold register (PFT) is a register that sets the threshold value when comparing the
values with the A/D conversion result.
8-bit data in PFT is compared to the higher 8 bits (FF09H) of the 10-bit A/D conversion result.
PFT can be set by an 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Figure 12-8. Format of Power-Fail Comparison Threshold Register (PFT)
Address: FF2BH
Symbol
PFT
Caution If data is written to PFT, a wait cycle is generated. Do not write data to PFT when the CPU is
operating on the subsystem clock and the high-speed system clock is stopped. For details, see
CHAPTER 32 CAUTIONS FOR WAIT.
CHAPTER 12 A/D CONVERTER
After reset: 00H R/W
<7> <6> 5
PFEN PFCM 0
PFEN Power-fail comparison enable
0 Stops power-fail comparison (used as a normal A/D converter)
1 Enables power-fail comparison (used for power-fail detection)
PFCM
Interrupt request signal (INTAD) generation
Higher 8 bits of
ADCR ≥ PFT
0
Higher 8 bits of
No INTAD generation
ADCR < PFT
Higher 8 bits of
No INTAD generation
ADCR ≥ PFT
1
Higher 8 bits of
INTAD generation
ADCR < PFT
After reset: 00H R/W
7 6 5
PFT7 PFT6 PFT5 PFT4
User's Manual U16899EJ2V0UD
4 3 2 1
0 0 0 0
Power-fail comparison mode selection
4 3 2 1
PFT3 PFT2 PFT1
0
0
0
PFT0
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