Table of Contents
Advertisement
3.4.8 Based indexed addressing
[Function]
The B or C register contents specified in an instruction word are added to the contents of the base register, that
is, the HL register pair in the register bank specified by the register bank select flag (RBS0 and RBS1), and the
sum is used to address the memory. Addition is performed by expanding the B or C register contents as a
positive number to 16 bits. A carry from the 16th bit is ignored. This addressing can be carried out for all the
memory spaces.
[Operand format]
Identifier
[Description example]
In the case of MOV A, [HL + B] (selecting B register)
[Illustration]
HL
The contents of the memory
addressed are transferred.
A
80
CHAPTER 3 CPU ARCHITECTURE
−
[HL + B], [HL + C]
Operation code
16
H
7
User's Manual U16899EJ2V0UD
Description
1
0
1
0
1
0
1
1
8
7
L
+
7
B
7
Memory
0
0
0
0
Advertisement
Table of Contents
