NEC MuPD78F0132H User Manual page 232

8-bit single-chip microcontrollers, 78k0/ke1plus
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Table 10-2. Option Byte Setting and Watchdog Timer Operation Mode
Watchdog timer clock
source
Operation after reset
Operation mode selection
Features
Notes 1.
As long as power is being supplied, Ring-OSC oscillation cannot be stopped (except in the reset
period).
2.
The conditions under which clock supply to the watchdog timer is stopped differ depending on the
clock source of the watchdog timer.
<1> If the clock source is f
conditions.
• When f
• In HALT/STOP mode
• During oscillation stabilization time
<2> If the clock source is f
conditions.
• If the CPU clock is f
• In HALT/STOP mode
Remarks 1. f
: Ring-OSC clock oscillation frequency
R
2. f
: High-speed system clock oscillation frequency
XP
232
CHAPTER 10 WATCHDOG TIMER
Ring-OSC Cannot Be Stopped
Note 1
Fixed to f
.
R
Operation starts with the maximum interval
18
(2
/f
).
R
The interval can be changed only once.
The watchdog timer cannot be stopped.
, clock supply to the watchdog timer is stopped under the following
XP
is stopped
XP
, clock supply to the watchdog timer is stopped under the following
R
and if f
is stopped by software before execution of the STOP instruction
XP
R
User's Manual U16899EJ2V0UD
Option Byte
Ring-OSC Can Be Stopped by Software
• Selectable by software (f
• When reset is released: f
Operation starts with maximum interval
18
(2
/f
).
R
The clock selection/interval can be changed
only once.
The watchdog timer can be stopped in
Note 2
standby mode
.
, f
or stopped)
XP
R
R

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