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Note 1
f
(f
)
X
X
Note 1
2
4
f
/2
(f
/2
)
X
X
8
6
Note 1
f
/2
(f
/2
)
X
X
Noise
TI000/P00
eliminator
Note 1
(TI001/P05)
f
X
Notes 1.
Frequencies and pin names without parentheses are for 16-bit timer/event counter 00, and those in
parentheses are for 16-bit timer/event counter 01.
2.
OVF0n is set to 1 only when 16-bit timer capture/compare register 00n is set to FFFFH.
Count clock
TM0n count value
0000H
Timer operation enabled
CR00n
INTTM00n
Remark Interval time = (N + 1) × t
N = 0001H to FFFFH (settable range)
µ
n = 0:
PD78F0132H
µ
n = 0, 1:
PD78F0133H, 78F0134H, 78F0136H, 78F0138H, 78F0138HD
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Figure 6-16. Interval Timer Configuration Diagram
16-bit timer capture/compare
register 00n (CR00n)
Figure 6-17. Timing of Interval Timer Operation
t
0001H
N
0000H 0001H
Clear
N
N
Interrupt acknowledged
User's Manual U16899EJ2V0UD
16-bit timer counter 0n
(TM0n)
N
Clear
N
INTTM00n
Note 2
OVF0n
Clear
circuit
0000H 0001H
N
N
Interrupt acknowledged
155
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