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CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Figure 6-36. Control Register Settings for One-Shot Pulse Output with Software Trigger
7
6
TMC0n
0
0
7
6
CRC0n
0
0
7
OSPT0n
TOC0n
0
0
ES1n1
ES1n0
PRM0n
0/1
0/1
Caution Do not set the CR00n and CR01n registers to 0000H.
µ
Remark n = 0:
PD78F0132H
µ
n = 0, 1:
PD78F0133H, 78F0134H, 78F0136H, 78F0138H, 78F0138HD
(a) 16-bit timer mode control register 0n (TMC0n)
5
4
TMC0n3
0
0
0
(b) Capture/compare control register 0n (CRC0n)
5
4
3
0
0
0
(c) 16-bit timer output control register 0n (TOC0n)
OSPE0n
TOC0n4
LVS0n
1
1
0/1
(d) Prescaler mode register 0n (PRM0n)
ES0n1
ES0n0
3
0/1
0/1
0
User's Manual U16899EJ2V0UD
TMC0n2 TMC0n1
OVF0n
1
0
0
CRC0n2 CRC0n1 CRC0n0
0
0/1
0
LVR0n
TOC0n1
TOE0n
0/1
1
1
Enables TO0n output.
Inverts output upon match
between TM0n and CR00n.
Specifies initial value of
TO0n output F/F (setting "11" is prohibited.)
Inverts output upon match
between TM0n and CR01n.
Sets one-shot pulse output mode.
Set to 1 for output.
2
PRM0n1 PRM0n0
0
0/1
0/1
Selects count clock.
Setting invalid
(setting "10" is prohibited.)
Setting invalid
(setting "10" is prohibited.)
Free-running mode
CR00n as compare register
CR01n as compare register
173
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