Viavi Xgig User Manual page 151

Lane Control
The
Load Current Lane Settings
TraceControl.
The
Apply to Hardware
hardware.
The Automatically Apply to Hardware
and lane settings when you modify a value of any settings.
The Link Speed
General Settings
The
Max Lane Width
lane width the hardware will detect and the default if it does not see any training sequence.
Depending on the width value, the number of enabled lane assignment
controls will change. The drop-down menu is only enabled on the first port of the pair since both
ports have the same setting.
The
Link Number
Since the hardware supports only one link number, the
The Ignore errors during Low Power States
capture the errors produced when a DUT goes in and out of a low power state (ASPM mode) when
enabled. It also ignores them for state transition condition, LEDs and error counter columns. You
may adjust the lane settings to get clean Green LEDs. The setting is enabled by default. See
"Ignore errors during Low Power States (Also affects LEDs, Counters, and State Transitions)" on
page 116.
The Scrambling
This option is enabled by default.
The
Interposer Lane Enable
This feature is required in order to allow the chassis to interoperate with x1, x2 or x4 PCIe cards
installed in the interposer. The motherboard will see all eight lanes as "enabled" because the
interposer has all eight lanes populated. If the interposer does not power down lanes that are not
present on the card, then the motherboard will try to communicate with PCIe card lanes that do not
exist. This is known to cause issues on some Operating System/Motherboard combinations. The
default is that all eight lanes are enabled. Please note that turning off a physical lane also shuts
down the lane between the host and the device under test.
Note: When supporting Xgig Jammer for PCIe, the interposer row in the Link View displays
a message that the port is connected to Jammer and the Lane Enable check boxes and EQ
drop-down in the Lane Control tab are disabled on the port that is connected to the Jammer.
The
Manual Polarity
polarity, check the checkbox. When the box is unchecked, the lane polarity is automatic. In this
case, the
over the lane polarity. Each of the eight motherboard uplink and downlink PCIe lanes can be
independently assigned to have inverted polarity for dealing with devices under test that the
auto-detection scheme does not work with. This is a pre-capture configuration option only. The
lanes cannot be polarity inverted post-capture. The default is all unchecked.
Xgig Analyzer User's Guide
button sends and applies the current link and lane settings to the
drop-down menu is a duplicate of the
tab.
drop-down menu allows you to choose from x1 to x8. This is the maximum
drop-down menus allow you to manually enter a link number or select
checkbox allows you to specify whether the capture will include scrambled data.
checkboxes allow shutting down physical lanes when unchecked.
checkboxes allow you to control lane polarity. To manually control lane
checkbox group below is disabled. These checkboxes give control
Invert Physical Lane
Chapter 4, Xgig TraceControl Capture Configuration
button retrieves the current hardware settings and loads them in
checkbox enables automatic send and apply of the link
Link Speed
Auto
checkbox allows the hardware to exclude from the
drop-down menu in the
Physical Lane
mode takes the lowest value found.
drop-down
.
Auto
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