Pod Clock Field (State Only) - Agilent Technologies 1670G Series User Manual

Logic Analyzer Reference
The Analyzer Format Menu

Pod clock field (State only)

The pod clock field identifies the type of clock arrangement assigned to
each pod. When the pod clock field is selected, a clock arrangement
menu appears with the choices of Master, Slave, or Demultiplex. Once
a pod clock is assigned a clock arrangement, its identity and function
follows what is configured in the Master and Slave Clock fields.
Master
This option specifies that data on all pods designated "Master Clock," in
the same analyzer, are strobed into memory when the status of the
clock lines match the clocking arrangement specified under the Master
Clock.
"Master and Slave Clock fields (State only)" found later in this section
See Also
for information about configuring a clocking arrangement.
Slave
This option specifies that data on a pod designated "Slave Clock" is
latched when the status of the slave clock meets the requirements of
the slave clocking arrangement. Then, followed by a match of the
master clock and the master clock arrangement, the slave data is
strobed into analyzer memory along with the master data. See the
figure on the following page.
If multiple slave clocks occur between master clocks, only the data
latched by the last slave clock prior to the master clock is strobed into
analyzer memory.
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