Configurable Logic Blocks; Standard Configurable Logic Blocks; Functionality - ABB REG650 Technical Manual

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1MRK 502 034-UEN -

Technical Manual

IEC09000612 V1 EN

Trip matrix internal logic

Output signals from TMAGGIO are typically connected to other logic blocks or

directly to output contacts in the IED. When used for direct tripping of the circuit

breaker(s) the pulse time delay shall be set to approximately 0.150 seconds in order

to obtain satisfactory minimum duration of the trip pulse to the circuit breaker trip

Configurable logic blocks

A number of logic blocks and timers are available for the user to adapt the

configuration to the specific application needs.

OR function block.

INVERTER function blocks that inverts the input signal.

PULSETIMER function block can be used, for example, for pulse extensions

or limiting of operation of outputs.

IEC09000612_1_en.vsd