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(d) Release by RESET input
As is the case with normal reset operation, a program is executed after branch to the reset vector
address.
Figure 24-3. HALT Mode Released by RESET Input
HALT
Instruction
RESET
Signal
Operating
Mode
Clock
Remarks 1. f
: Main system clock oscillation frequency
X
2. Figures in parentheses apply to operation with f
Table 24-2. Operation after HALT Mode Release
Release Source
MKxx
Maskable interrupt
request
Non-maskable interrupt
request
Test input
RESET input
x: Don't care
CHAPTER 24 STANDBY FUNCTION
Reset
HALT Mode
Period
Oscillation
Oscillation
stop
PRxx
IE
0
0
0
0
0
1
0
1
0
0
1
x
0
1
1
1
x
x
–
–
x
0
–
x
1
–
x
–
–
x
Wait
17
(2
/f
: 26.2 ms)
x
Oscillation
Stabilization
Operating
Wait Status
Mode
Oscillation
= 5.0 MHz.
X
ISP
Operation
x
Next address instruction execution
x
Interrupt service execution
1
Next address instruction execution
0
1
Interrupt service execution
x
HALT mode hold
x
Interrupt service execution
x
Next address instruction execution
x
HALT mode hold
x
Reset processing
549
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